PowerPC Assembly Tutorial on AIX: Chapter 4, Most frequently used registers

We will digress a little and introduce the most frequently used registers, before we deal with the question of why we got a return value of 97 instead of 5 in the previous program.

In this section, we will not discuss all the registers of the PowerPC architectures, but only the most frequently used registers of the UISA (User Instruction Set Architecture) model. The UISA model defines the architecture to which user level programs should conform.

In the UISA model, we have the following registers:

• 32 General Purpose Registers (GPRs)
  
• 32 Floating Point Registers (FPRs)
  
• Condition Register (CR)
  
• Floating Point Status and Control Register (FPSCR)
  
• Exception Register (XER)
  
• Link Register (LR)
  
• Counter Register (CTR)
  

There are 32 GPRs, named GPR0 – GPR31. These registers are 64-bit registers in 64-bit implementation, and 32-bit in 32-bit implementations. They can be used to manipulate integer data. GPR0 is used in function prologs. GPR1 is used as the stack pointer, and GPR2 is used as a pointer to the TOC, and these two registers should not be used for any other purpose.

GPR0-GPR12 are volatile registers, that is, their values are not preserved across function calls. GPR13-GPR31 are non-volatile registers. If a function wishes to overwrite these non-volatile registers, it must first save the value in the stack, and restore the value before returning.
GPR12 is also used in special handling in the glink code (We'll see what the glink code is later). In 64-bit architectures, GPR13 contains the thread pointer.

The link register is used to store the return address from a function call, and is generally automatically updated by the bl instruction. To return to the address contained in the LR, the blr instruction is used. The instruction 'mtlr' (move to link register) can be used to modify the link register to an arbitrary value.

The condition register (CR) is a 32-bit register divided into eight 4-bit fields, named CR0-CR7. The results of arithmetic and logical operations are stored in the condition register fields, and they can be used to perform conditional branches. CR0 is volatile, and CR1-CR7 are non-volatile. Hence, if any function attempts to change any of the condition registers CR1-CR7, it must save the state and restore it before returning to the caller.

The Counter Register (CTR) is used to perform branches, and used in looping to hold the loop count value. The value of the counter register may be modified by the 'mtctr' (move to counter register) instruction.